(1) Field of the Invention
This invention relates a static memory architecture, in particular to a resonant tunneling diode multiple-valued memory system. This is a co-pending patent application of U.S. patent application Ser. No. 09/512,049.
(2) Description of the Related Art
In U.S. Pat. No. 5,280,445, a multiple-dimensional RTD memory cell was disclosed, where a single RTD memory cell can store a large number of states, as compared to a conventional binary memory cell, which can only store two states, namely: the "0" logic state and the "1" logic state.
An RTD has a folding voltage-current (V-I) characteristic as shown in FIG. 1, curve (a) where the positive slope of the V-I characteristic represents positive differential resistance and the negative slope of the V-I characteristic represents negative differential resistance. When the positive resistance is connected in series with the RTD, the positive differential resistance is increased and the negative differential resistance is reduced as shown in FIG. 1, curve (b). Further increase in the series resistance causes the V-I characteristic to yield a folding characteristic with hysteresis as shown in FIG. 2.
The multiple-dimensional RTD memory cell disclosed in U.S. Pat. No. 5,280,445 utilizes this hysteretic characteristic. When two RTDs RTDu and RTDd each with a one-peak hysteretic folding V-I characteristic are connected in series through a resistance R as shown in FIG. 3, the circuit becomes a 4-state memory cell. The cell can have four stable states as depicted in FIG. 4. The stable operating points are the intersections S1, S2, S3, S4 of the positive differential resistance sections of the folding characteristics. By applying two different voltages V.sub.H and V.sub.L across the resistance, the memory cell can be set (written) to the different memory states. In this figure, Vpu, Vvu, and Vpd. Vvd denote the peak and valley of RTDu and RTDd, respectively. During writing, when V.sub.L is less than Vp1, the positive differential resistance ra1 is effective, and when V.sub.L exceeds Vpd, rd2 is effective. Similarly, when V.sub.H is higher than Vpu, ru1 is effective, and when V.sub.H is less than Vpu, rub2 is effective. The stable operating points are determined by the intersections of the effective differential resistances. Thus, by applying different combinations of V.sub.L and V.sub.H, the memory cell can be set to different memory states.
In a copending U.S. patent application, Ser. No. 09/512,049, it was disclosed that a 2-dimensional RTD memory cell can also be accessed by sensing its node voltage Vm and its series current Im, as shown in FIG. 5.
While the RTD memory cell was disclosed in the U.S. Pat. No. 5,380,445 and in the copending application Ser. No. 09/512,049, the architecture for incorporating the RTD memory cell was not disclosed.